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Computer Science > Machine Learning

arXiv:2109.12686 (cs)
[Submitted on 26 Sep 2021]

Title:Efficient Non-linear Calculators

Authors:Adedamola Wuraola, Nitish Patel
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Abstract:A novel algorithm for producing smooth nonlinearities on digital hardware is presented. The non-linearities are inherently quadratic and have both symmetrical and asymmetrical variants. The integer (and fixed point) implementation is highly amenable for use with digital gates on an ASIC or FPGA. The implementations are multiplier-less. Scaling of the non-linear output, as required in an LSTM cell, is integrated into the implementation. This too does not require a multiplier.
The non-linearities are useful as activation functions in a variety of ANN architectures. The floating point mappings have been compared with other non-linearities and have been benchmarked. Results show that these functions should be considered in the ANN design phase.
The hardware resource usage of the implementations have been thoroughly investigated. Our results make a strong case for implementions in edge applications. This document summarizes the findings and serves to give a quick overview of the outcomes of our research\footnote{The authors peer-reviewed manuscripts (available at this https URL) offer more detail and may be better suited for a thorough consideration}.
Comments: 8 pages, 13 figures, summary paper
Subjects: Machine Learning (cs.LG); Hardware Architecture (cs.AR)
Cite as: arXiv:2109.12686 [cs.LG]
  (or arXiv:2109.12686v1 [cs.LG] for this version)
  https://doi.org/10.48550/arXiv.2109.12686

Submission history

From: Adedamola Wuraola [view email]
[v1] Sun, 26 Sep 2021 19:52:54 UTC (584 KB)
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